Searched refs:mmTPC1_QM_GLBL_CFG0 (Results 1 – 6 of 6) sorted by relevance
22 #define mmTPC1_QM_GLBL_CFG0 0xE48000 macro
925 pb_addr = (mmTPC1_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in goya_init_tpc_protection_bits()926 word_offset = ((mmTPC1_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in goya_init_tpc_protection_bits()927 mask = 1 << ((mmTPC1_QM_GLBL_CFG0 & 0x7F) >> 2); in goya_init_tpc_protection_bits()
1889 WREG32(mmTPC1_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2281 (mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0); in gaudi_init_tpc_qman()2356 tpc_offset += mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0; in gaudi_init_tpc_qmans()2411 tpc_offset += mmTPC1_QM_GLBL_CFG0 - mmTPC0_QM_GLBL_CFG0; in gaudi_disable_tpc_qmans()
5634 pb_addr = (mmTPC1_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in gaudi_init_tpc_protection_bits()5635 word_offset = ((mmTPC1_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in gaudi_init_tpc_protection_bits()5636 mask = 1U << ((mmTPC1_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()