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Searched refs:mmSRBM_SOFT_RESET (Results 1 – 25 of 27) sorted by relevance

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/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dcik_ih.c385 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
388 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
389 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
394 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
395 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
Diceland_ih.c369 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
372 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
373 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
378 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
379 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
Dcz_ih.c369 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
372 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
373 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
378 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
379 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
Dtonga_ih.c420 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
423 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
424 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
429 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
430 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
Dgmc_v6_0.c1014 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1017 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1018 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1023 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1024 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
Dvce_v3_0.c658 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
661 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
662 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
667 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
668 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
Dvce_v4_0.c746 tmp = RREG32(mmSRBM_SOFT_RESET);
749 WREG32(mmSRBM_SOFT_RESET, tmp);
750 tmp = RREG32(mmSRBM_SOFT_RESET);
755 WREG32(mmSRBM_SOFT_RESET, tmp);
756 tmp = RREG32(mmSRBM_SOFT_RESET);
Dsdma_v2_4.c985 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
988 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
989 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
994 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
995 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
Dcik_sdma.c1089 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1092 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1093 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1098 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1099 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
Dgmc_v7_0.c1205 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1208 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1209 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1214 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1215 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
Duvd_v6_0.c1178 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1181 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1182 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1187 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1188 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
Dsdma_v3_0.c1319 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1322 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1323 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1328 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1329 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
Dgmc_v8_0.c1367 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1370 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1371 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1376 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1377 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
Duvd_v4_2.c269 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v4_2_start()
652 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v4_2_soft_reset()
Duvd_v3_1.c333 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v3_1_start()
752 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v3_1_soft_reset()
Duvd_v5_0.c323 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v5_0_start()
575 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v5_0_soft_reset()
Duvd_v7_0.c1499 tmp = RREG32(mmSRBM_SOFT_RESET);
1502 WREG32(mmSRBM_SOFT_RESET, tmp);
1503 tmp = RREG32(mmSRBM_SOFT_RESET);
1508 WREG32(mmSRBM_SOFT_RESET, tmp);
1509 tmp = RREG32(mmSRBM_SOFT_RESET);
Ddce_v8_0.c2845 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2848 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2849 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2854 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2855 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
Ddce_v10_0.c2957 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2960 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2961 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2966 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2967 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
Ddce_v11_0.c3083 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3086 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3087 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3092 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3093 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_1_0_d.h262 #define mmSRBM_SOFT_RESET 0x0398 macro
Doss_2_4_d.h83 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_3_0_1_d.h81 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_2_0_d.h77 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_3_0_d.h93 #define mmSRBM_SOFT_RESET 0x398 macro

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