Searched refs:mmSCRATCH_REG1_BASE_IDX (Results 1 – 9 of 9) sorted by relevance
85 uint32_t r1 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG1; \107 uint32_t r2 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG2; \108 uint32_t r3 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG3; \
745 …scratch_reg1 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_RE… in gfx_v9_0_rlcg_wreg()746 …scratch_reg2 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_RE… in gfx_v9_0_rlcg_wreg()747 …scratch_reg3 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_RE… in gfx_v9_0_rlcg_wreg()
1378 …scratch_reg1 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_RE… in gfx_v10_rlcg_wreg()1379 …scratch_reg2 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_RE… in gfx_v10_rlcg_wreg()1380 …scratch_reg3 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_RE… in gfx_v10_rlcg_wreg()
216 #define mmSCRATCH_REG1_BASE_IDX … macro
4644 #define mmSCRATCH_REG1_BASE_IDX … macro
4874 #define mmSCRATCH_REG1_BASE_IDX … macro
4830 #define mmSCRATCH_REG1_BASE_IDX … macro
7108 #define mmSCRATCH_REG1_BASE_IDX … macro
6731 #define mmSCRATCH_REG1_BASE_IDX … macro
