Home
last modified time | relevance | path

Searched refs:mmSCRATCH_REG0_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_offset.h214 #define mmSCRATCH_REG0_BASE_IDX … macro
Dgc_9_0_offset.h4642 #define mmSCRATCH_REG0_BASE_IDX … macro
Dgc_9_1_offset.h4872 #define mmSCRATCH_REG0_BASE_IDX … macro
Dgc_9_2_1_offset.h4828 #define mmSCRATCH_REG0_BASE_IDX … macro
Dgc_10_1_0_offset.h7106 #define mmSCRATCH_REG0_BASE_IDX … macro
Dgc_10_3_0_offset.h6729 #define mmSCRATCH_REG0_BASE_IDX … macro
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dsoc15_common.h84 uint32_t r0 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_REG0; \
Dgfx_v9_0.c744 …scratch_reg0 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_RE… in gfx_v9_0_rlcg_wreg()
Dgfx_v10_0.c1377 …scratch_reg0 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_RE… in gfx_v10_rlcg_wreg()