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Searched refs:mmRLC_SERDES_WR_CU_MASTER_MASK (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h1301 #define mmRLC_SERDES_WR_CU_MASTER_MASK 0x311d macro
Dgfx_7_2_d.h1314 #define mmRLC_SERDES_WR_CU_MASTER_MASK 0x311d macro
Dgfx_8_0_d.h1414 #define mmRLC_SERDES_WR_CU_MASTER_MASK 0xec5d macro
Dgfx_8_1_d.h1412 #define mmRLC_SERDES_WR_CU_MASTER_MASK 0xec5d macro
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c3594 WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff); in gfx_v7_0_enable_cgcg()
3648 WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff); in gfx_v7_0_enable_mgcg()
3699 WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff); in gfx_v7_0_enable_mgcg()
Dgfx_v8_0.c5516 WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff); in gfx_v8_0_send_serdes_cmd()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6081 #define mmRLC_SERDES_WR_CU_MASTER_MASK … macro
Dgc_9_1_offset.h6303 #define mmRLC_SERDES_WR_CU_MASTER_MASK … macro
Dgc_9_2_1_offset.h6281 #define mmRLC_SERDES_WR_CU_MASTER_MASK … macro