Searched refs:mmRLC_CGCG_CGLS_CTRL_3D (Results 1 – 9 of 9) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.c | 4869 def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
4877 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
4887 def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
4893 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
5143 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v9_0_get_clockgating_state()
|
| D | gfx_v10_0.c | 7419 def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v10_0_update_3d_clock_gating()
7426 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v10_0_update_3d_clock_gating()
7436 def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v10_0_update_3d_clock_gating()
7442 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v10_0_update_3d_clock_gating()
7679 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v10_0_get_clockgating_state()
|
| D | gfx_v8_0.c | 318 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
349 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
381 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
|
| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_8_0_d.h | 1394 #define mmRLC_CGCG_CGLS_CTRL_3D 0xec9d macro
|
| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6253 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
|
| D | gc_9_2_1_offset.h | 6451 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
|
| D | gc_9_1_offset.h | 6475 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
|
| D | gc_10_1_0_offset.h | 9561 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
|
| D | gc_10_3_0_offset.h | 9399 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
|
