Home
last modified time | relevance | path

Searched refs:mmRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL6_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddpcs_3_0_0_offset.h185 #define mmRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL6_BASE_IDX … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_2_1_0_offset.h221 #define mmRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL6_BASE_IDX … macro
Ddpcs_2_0_0_offset.h213 #define mmRDPCSTX1_RDPCSTX_DMCU_DPALT_PHY_CNTL6_BASE_IDX … macro