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Searched refs:mmPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h515 #define mmPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h707 #define mmPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX … macro