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Searched refs:mmPHYPLLE_PIXCLK_RESYNC_CNTL (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_2_d.h1073 #define mmPHYPLLE_PIXCLK_RESYNC_CNTL 0x10c macro
Ddce_12_0_offset.h674 #define mmPHYPLLE_PIXCLK_RESYNC_CNTL … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h168 #define mmPHYPLLE_PIXCLK_RESYNC_CNTL … macro
Ddcn_1_0_offset.h482 #define mmPHYPLLE_PIXCLK_RESYNC_CNTL … macro
Ddcn_2_0_0_offset.h154 #define mmPHYPLLE_PIXCLK_RESYNC_CNTL … macro
Ddcn_3_0_0_offset.h135 #define mmPHYPLLE_PIXCLK_RESYNC_CNTL … macro