Home
last modified time | relevance | path

Searched refs:mmPHYPLLC_PIXCLK_RESYNC_CNTL (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_2_d.h1071 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL 0x102 macro
Ddce_12_0_offset.h654 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h156 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_1_0_offset.h468 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_2_0_0_offset.h136 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro
Ddcn_3_0_0_offset.h117 #define mmPHYPLLC_PIXCLK_RESYNC_CNTL … macro