/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
D | mxgpu_vi.c | 103 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 239 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
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D | gfx_v8_0.c | 202 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 313 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 344 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 376 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 420 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 476 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 575 mmPA_SC_ENHANCE, 0xffffffff, 0x00000001, 681 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
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D | soc15.c | 429 reg == SOC15_REG_OFFSET(GC, 0, mmPA_SC_ENHANCE) || in soc15_program_register_sequence()
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D | gfx_v9_0.c | 513 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001), 578 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001), 637 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001), 658 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),
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D | gfx_v10_0.c | 203 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009), 1307 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009), 1352 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009),
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D | gfx_v7_0.c | 2040 WREG32(mmPA_SC_ENHANCE, PA_SC_ENHANCE__ENABLE_PA_SC_OUT_OF_ORDER_MASK); in gfx_v7_0_constants_init()
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/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_6_0_d.h | 967 #define mmPA_SC_ENHANCE 0x22FC macro
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D | gfx_7_0_d.h | 1093 #define mmPA_SC_ENHANCE 0x22fc macro
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D | gfx_7_2_d.h | 1106 #define mmPA_SC_ENHANCE 0x22fc macro
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D | gfx_8_0_d.h | 1188 #define mmPA_SC_ENHANCE 0x22fc macro
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D | gfx_8_1_d.h | 1189 #define mmPA_SC_ENHANCE 0x22fc macro
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/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 381 #define mmPA_SC_ENHANCE … macro
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D | gc_9_1_offset.h | 375 #define mmPA_SC_ENHANCE … macro
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D | gc_9_2_1_offset.h | 371 #define mmPA_SC_ENHANCE … macro
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D | gc_10_1_0_offset.h | 2415 #define mmPA_SC_ENHANCE … macro
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D | gc_10_3_0_offset.h | 2502 #define mmPA_SC_ENHANCE … macro
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