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Searched refs:mmMC_SEQ_WR_CTL_D1 (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h1005 #define mmMC_SEQ_WR_CTL_D1 0x0A30 macro
Dgmc_7_1_d.h644 #define mmMC_SEQ_WR_CTL_D1 0xa30 macro
Dgmc_8_1_d.h748 #define mmMC_SEQ_WR_CTL_D1 0xa30 macro
/Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c2431 case mmMC_SEQ_WR_CTL_D1: in iceland_check_s0_mc_reg_index()
2630 …gister(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in iceland_initialize_mc_reg_table()
Dci_smumgr.c2503 case mmMC_SEQ_WR_CTL_D1: in ci_check_s0_mc_reg_index()
2702 …gister(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()
Dtonga_smumgr.c2894 case mmMC_SEQ_WR_CTL_D1: in tonga_check_s0_mc_reg_index()
3110 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in tonga_initialize_mc_reg_table()
Dfiji_smumgr.c2532 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in fiji_initialize_mc_reg_table()