Home
last modified time | relevance | path

Searched refs:mmMC_SEQ_TRAIN_WAKEUP_CNTL (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dgmc_v6_0.c199 if (RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL) & MC_SEQ_TRAIN_WAKEUP_CNTL__TRAIN_DONE_D0_MASK) in gmc_v6_0_mc_load_microcode()
204 if (RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL) & MC_SEQ_TRAIN_WAKEUP_CNTL__TRAIN_DONE_D1_MASK) in gmc_v6_0_mc_load_microcode()
Dgmc_v7_0.c226 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode()
232 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v7_0_mc_load_microcode()
Dgmc_v8_0.c351 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode()
357 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_6_0_d.h968 #define mmMC_SEQ_TRAIN_WAKEUP_CNTL 0x0A3A macro
Dgmc_7_1_d.h659 #define mmMC_SEQ_TRAIN_WAKEUP_CNTL 0xa3a macro
Dgmc_8_1_d.h763 #define mmMC_SEQ_TRAIN_WAKEUP_CNTL 0xa3a macro