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Searched refs:mmLVTMA_PWRSEQ_CNTL (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3950 #define mmLVTMA_PWRSEQ_CNTL 0x1919 macro
Ddce_8_0_d.h1281 #define mmLVTMA_PWRSEQ_CNTL 0x1919 macro
Ddce_10_0_d.h1568 #define mmLVTMA_PWRSEQ_CNTL 0x481b macro
Ddce_11_0_d.h1393 #define mmLVTMA_PWRSEQ_CNTL 0x481b macro
Ddce_11_2_d.h1473 #define mmLVTMA_PWRSEQ_CNTL 0x481b macro
Ddce_12_0_offset.h1850 #define mmLVTMA_PWRSEQ_CNTL … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h11351 #define mmLVTMA_PWRSEQ_CNTL … macro
Ddcn_1_0_offset.h10393 #define mmLVTMA_PWRSEQ_CNTL … macro
Ddcn_2_0_0_offset.h12768 #define mmLVTMA_PWRSEQ_CNTL … macro
Ddcn_3_0_0_offset.h12578 #define mmLVTMA_PWRSEQ_CNTL … macro