Searched refs:mmLB_INTERRUPT_MASK (Results 1 – 7 of 7) sorted by relevance
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
D | dce_v8_0.c | 2900 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 2902 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state() 2905 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 2907 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state() 2951 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vline_interrupt_state() 2953 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vline_interrupt_state() 2956 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vline_interrupt_state() 2958 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vline_interrupt_state()
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D | dce_v10_0.c | 2988 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vblank_interrupt_state() 2991 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vblank_interrupt_state() 2994 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vblank_interrupt_state() 2997 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vblank_interrupt_state() 3017 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vline_interrupt_state() 3020 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vline_interrupt_state() 3023 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vline_interrupt_state() 3026 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vline_interrupt_state()
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D | dce_v11_0.c | 3114 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state() 3117 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state() 3120 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state() 3123 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state() 3143 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vline_interrupt_state() 3146 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vline_interrupt_state() 3149 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vline_interrupt_state() 3152 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vline_interrupt_state()
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/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/ |
D | dce_8_0_d.h | 4593 #define mmLB_INTERRUPT_MASK 0x1ac8 macro
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D | dce_10_0_d.h | 5274 #define mmLB_INTERRUPT_MASK 0x1ac8 macro
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D | dce_11_0_d.h | 5332 #define mmLB_INTERRUPT_MASK 0x1ac8 macro
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D | dce_11_2_d.h | 6589 #define mmLB_INTERRUPT_MASK 0x1ac8 macro
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