Home
last modified time | relevance | path

Searched refs:mmGCEA_IO_RD_PRI_QUANT_PRI1_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_1_offset.h1940 #define mmGCEA_IO_RD_PRI_QUANT_PRI1_BASE_IDX … macro
Dgc_9_2_1_offset.h1884 #define mmGCEA_IO_RD_PRI_QUANT_PRI1_BASE_IDX … macro
Dgc_10_1_0_offset.h3972 #define mmGCEA_IO_RD_PRI_QUANT_PRI1_BASE_IDX … macro
Dgc_10_3_0_offset.h3775 #define mmGCEA_IO_RD_PRI_QUANT_PRI1_BASE_IDX … macro