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Searched refs:mmDSCC5_DSCC_MEM_POWER_CONTROL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h12219 #define mmDSCC5_DSCC_MEM_POWER_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h14351 #define mmDSCC5_DSCC_MEM_POWER_CONTROL_BASE_IDX … macro
Ddcn_3_0_0_offset.h13445 #define mmDSCC5_DSCC_MEM_POWER_CONTROL_BASE_IDX … macro