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Searched refs:mmDP3_DP_DPHY_BS_SR_SWAP_CNTL (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_resource.c90 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL 0x4DDC macro
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_resource.c89 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL 0x4DDC macro
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_resource.c97 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL 0x4DDC macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_0_d.h4560 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL 0x4ddc macro
Ddce_11_2_d.h5792 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL 0x4ddc macro
Ddce_12_0_offset.h11150 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h10941 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL … macro
Ddcn_1_0_offset.h9377 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL … macro
Ddcn_2_0_0_offset.h12028 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL … macro
Ddcn_3_0_0_offset.h11795 #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL … macro