Home
last modified time | relevance | path

Searched refs:mmDMCU_SMU_INTERRUPT_CNTL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h561 #define mmDMCU_SMU_INTERRUPT_CNTL_BASE_IDX … macro
Ddcn_1_0_offset.h933 #define mmDMCU_SMU_INTERRUPT_CNTL_BASE_IDX … macro
Ddcn_2_0_0_offset.h599 #define mmDMCU_SMU_INTERRUPT_CNTL_BASE_IDX … macro
Ddcn_3_0_0_offset.h484 #define mmDMCU_SMU_INTERRUPT_CNTL_BASE_IDX … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h733 #define mmDMCU_SMU_INTERRUPT_CNTL_BASE_IDX … macro