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Searched refs:mmDCCG_VSYNC_OTG5_LATCH_VALUE (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h662 #define mmDCCG_VSYNC_OTG5_LATCH_VALUE … macro
Ddcn_2_1_0_offset.h300 #define mmDCCG_VSYNC_OTG5_LATCH_VALUE … macro
Ddcn_2_0_0_offset.h310 #define mmDCCG_VSYNC_OTG5_LATCH_VALUE … macro
Ddcn_3_0_0_offset.h291 #define mmDCCG_VSYNC_OTG5_LATCH_VALUE … macro