Home
last modified time | relevance | path

Searched refs:mmDCCG_VSYNC_OTG4_LATCH_VALUE_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h661 #define mmDCCG_VSYNC_OTG4_LATCH_VALUE_BASE_IDX … macro
Ddcn_2_1_0_offset.h299 #define mmDCCG_VSYNC_OTG4_LATCH_VALUE_BASE_IDX … macro
Ddcn_2_0_0_offset.h309 #define mmDCCG_VSYNC_OTG4_LATCH_VALUE_BASE_IDX … macro
Ddcn_3_0_0_offset.h290 #define mmDCCG_VSYNC_OTG4_LATCH_VALUE_BASE_IDX … macro