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Searched refs:mmD5VGA_CONTROL (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c407 offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL; in dce120_timing_generator_disable_vga()
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_timing_generator.c1824 addr = mmD5VGA_CONTROL; in dce110_timing_generator_disable_vga()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h1045 #define mmD5VGA_CONTROL 0x00FA macro
Ddce_8_0_d.h5148 #define mmD5VGA_CONTROL 0xfa macro
Ddce_10_0_d.h6031 #define mmD5VGA_CONTROL 0xfa macro
Ddce_11_0_d.h6108 #define mmD5VGA_CONTROL 0xfa macro
Ddce_11_2_d.h7782 #define mmD5VGA_CONTROL 0xfa macro
Ddce_12_0_offset.h644 #define mmD5VGA_CONTROL … macro
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c1783 mmD5VGA_CONTROL,
Ddce_v8_0.c1746 mmD5VGA_CONTROL,
Ddce_v10_0.c1817 mmD5VGA_CONTROL,
Ddce_v11_0.c1859 mmD5VGA_CONTROL,
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h142 #define mmD5VGA_CONTROL … macro
Ddcn_1_0_offset.h454 #define mmD5VGA_CONTROL … macro
Ddcn_2_0_0_offset.h122 #define mmD5VGA_CONTROL … macro
Ddcn_3_0_0_offset.h103 #define mmD5VGA_CONTROL … macro