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Searched refs:mmCRTC_GSL_CONTROL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_hw_sequencer.c45 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
48 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
51 .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
54 .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
57 .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
60 .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_hw_sequencer.c44 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
47 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
50 .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
53 .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
56 .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
59 .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_hw_sequencer.c96 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
99 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
102 .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
105 .crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL),
Ddce110_timing_generator.c1301 address = CRTC_REG(mmCRTC_GSL_CONTROL); in dce110_timing_generator_setup_global_swap_lock()
1373 address = CRTC_REG(mmCRTC_GSL_CONTROL); in dce110_timing_generator_tear_down_global_swap_lock()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h973 #define mmCRTC_GSL_CONTROL 0x1B7B macro
Ddce_8_0_d.h851 #define mmCRTC_GSL_CONTROL 0x1b7b macro
Ddce_10_0_d.h980 #define mmCRTC_GSL_CONTROL 0x1b7b macro
Ddce_11_0_d.h791 #define mmCRTC_GSL_CONTROL 0x1b7b macro
Ddce_11_2_d.h840 #define mmCRTC_GSL_CONTROL 0x1b7b macro