Home
last modified time | relevance | path

Searched refs:mmCP_RB_WPTR_POLL_ADDR_LO (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h523 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
Dgfx_7_0_d.h218 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
Dgfx_7_2_d.h218 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
Dgfx_8_0_d.h242 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
Dgfx_8_1_d.h243 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c5922 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, in gfx_v10_0_cp_gfx_resume()
5959 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, in gfx_v10_0_cp_gfx_resume()
6242 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, mqd->cp_rb_wptr_poll_addr_lo); in gfx_v10_0_gfx_queue_init_register()
Dgfx_v8_0.c4305 WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
Dgfx_v9_0.c3276 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2384 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
Dgc_9_1_offset.h2661 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
Dgc_9_2_1_offset.h2599 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
Dgc_10_1_0_offset.h5025 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
Dgc_10_3_0_offset.h4676 #define mmCP_RB_WPTR_POLL_ADDR_LO macro