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Searched refs:mmCP_ME2_PIPE1_INT_CNTL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h270 #define mmCP_ME2_PIPE1_INT_CNTL 0x308a macro
Dgfx_7_2_d.h272 #define mmCP_ME2_PIPE1_INT_CNTL 0x308a macro
Dgfx_8_0_d.h303 #define mmCP_ME2_PIPE1_INT_CNTL 0x308a macro
Dgfx_8_1_d.h303 #define mmCP_ME2_PIPE1_INT_CNTL 0x308a macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2511 #define mmCP_ME2_PIPE1_INT_CNTL macro
Dgc_9_1_offset.h2785 #define mmCP_ME2_PIPE1_INT_CNTL macro
Dgc_9_2_1_offset.h2721 #define mmCP_ME2_PIPE1_INT_CNTL macro
Dgc_10_1_0_offset.h4849 #define mmCP_ME2_PIPE1_INT_CNTL macro
Dgc_10_3_0_offset.h4502 #define mmCP_ME2_PIPE1_INT_CNTL macro