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Searched refs:mmCP_HQD_PQ_BASE_HI (Results 1 – 18 of 18) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/pm/inc/
Dpolaris10_pwrvirus.h1508 { 0x00000000, mmCP_HQD_PQ_BASE_HI },
1518 { 0x00000000, mmCP_HQD_PQ_BASE_HI },
1528 { 0x00000000, mmCP_HQD_PQ_BASE_HI },
1538 { 0x00000000, mmCP_HQD_PQ_BASE_HI },
/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v8.c385 high == RREG32(mmCP_HQD_PQ_BASE_HI)) in kgd_hqd_is_occupied()
Damdgpu_amdkfd_gfx_v7.c390 high == RREG32(mmCP_HQD_PQ_BASE_HI)) in kgd_hqd_is_occupied()
Damdgpu_amdkfd_gfx_v10.c507 high == RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_BASE_HI))) in kgd_hqd_is_occupied()
Damdgpu_amdkfd_gfx_v9.c516 high == RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_BASE_HI))) in kgd_gfx_v9_hqd_is_occupied()
Damdgpu_amdkfd_gfx_v10_3.c492 high == RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_BASE_HI))) in hqd_is_occupied_v10_3()
Dmes_v10_1.c755 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi); in mes_v10_1_queue_init_register()
Dgfx_v9_0.c3596 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE_HI, in gfx_v9_0_kiq_init_register()
Dgfx_v10_0.c6566 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI, in gfx_v10_0_kiq_init_register()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h576 #define mmCP_HQD_PQ_BASE_HI 0x324e macro
Dgfx_7_2_d.h589 #define mmCP_HQD_PQ_BASE_HI 0x324e macro
Dgfx_8_0_d.h639 #define mmCP_HQD_PQ_BASE_HI 0x324e macro
Dgfx_8_1_d.h639 #define mmCP_HQD_PQ_BASE_HI 0x324e macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2837 #define mmCP_HQD_PQ_BASE_HI … macro
Dgc_9_1_offset.h3065 #define mmCP_HQD_PQ_BASE_HI … macro
Dgc_9_2_1_offset.h3021 #define mmCP_HQD_PQ_BASE_HI … macro
Dgc_10_1_0_offset.h5301 #define mmCP_HQD_PQ_BASE_HI … macro
Dgc_10_3_0_offset.h4934 #define mmCP_HQD_PQ_BASE_HI … macro