Home
last modified time | relevance | path

Searched refs:mmCP_HQD_HQ_CONTROL0_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2888 #define mmCP_HQD_HQ_CONTROL0_BASE_IDX … macro
Dgc_9_1_offset.h3116 #define mmCP_HQD_HQ_CONTROL0_BASE_IDX … macro
Dgc_9_2_1_offset.h3072 #define mmCP_HQD_HQ_CONTROL0_BASE_IDX … macro
Dgc_10_1_0_offset.h5352 #define mmCP_HQD_HQ_CONTROL0_BASE_IDX … macro
Dgc_10_3_0_offset.h4985 #define mmCP_HQD_HQ_CONTROL0_BASE_IDX … macro