/Linux-v5.10/drivers/gpu/drm/amd/pm/inc/ |
D | polaris10_pwrvirus.h | 1545 { 0x00000000, mmCP_HQD_ACTIVE }, 1548 { 0x00000001, mmCP_HQD_ACTIVE }, 1550 { 0x00000000, mmCP_HQD_ACTIVE }, 1553 { 0x00000001, mmCP_HQD_ACTIVE }, 1555 { 0x00000000, mmCP_HQD_ACTIVE }, 1558 { 0x00000001, mmCP_HQD_ACTIVE }, 1560 { 0x00000000, mmCP_HQD_ACTIVE }, 1563 { 0x00000001, mmCP_HQD_ACTIVE }, 1565 { 0x00000000, mmCP_HQD_ACTIVE }, 1568 { 0x00000001, mmCP_HQD_ACTIVE }, [all …]
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/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_amdkfd_gfx_v8.c | 236 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load() 379 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied() 500 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
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D | amdgpu_amdkfd_gfx_v7.c | 249 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load() 384 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied() 502 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
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D | amdgpu_amdkfd_gfx_v10.c | 298 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in kgd_hqd_load() 501 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_hqd_is_occupied() 629 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_hqd_destroy()
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D | amdgpu_amdkfd_gfx_v9.c | 307 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in kgd_gfx_v9_hqd_load() 510 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_gfx_v9_hqd_is_occupied() 577 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in kgd_gfx_v9_hqd_destroy()
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D | amdgpu_amdkfd_gfx_v10_3.c | 283 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in hqd_load_v10_3() 486 act = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in hqd_is_occupied_v10_3() 550 temp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE)); in hqd_destroy_v10_3()
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D | mes_v10_1.c | 780 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, mqd->cp_hqd_active); in mes_v10_1_queue_init_register()
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D | gfx_v9_0.c | 3566 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_init_register() 3569 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_init_register() 3639 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, in gfx_v9_0_kiq_init_register() 3654 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_fini_register() 3659 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_fini_register() 3668 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, 0); in gfx_v9_0_kiq_fini_register()
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D | gfx_v7_0.c | 2901 if (RREG32(mmCP_HQD_ACTIVE) & 1) { in gfx_v7_0_mqd_deactivate() 2904 if (!(RREG32(mmCP_HQD_ACTIVE) & 1)) in gfx_v7_0_mqd_deactivate() 3059 for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++) in gfx_v7_0_mqd_commit()
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D | gfx_v8_0.c | 4414 if (RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK) { in gfx_v8_0_deactivate_hqd() 4417 if (!(RREG32(mmCP_HQD_ACTIVE) & CP_HQD_ACTIVE__ACTIVE_MASK)) in gfx_v8_0_deactivate_hqd() 4622 for (mqd_reg = mmCP_MQD_BASE_ADDR; mqd_reg <= mmCP_HQD_ACTIVE; mqd_reg++) in gfx_v8_0_mqd_commit()
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D | gfx_v10_0.c | 6516 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, 0); in gfx_v10_0_kiq_init_register() 6536 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v10_0_kiq_init_register() 6539 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v10_0_kiq_init_register() 6609 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, in gfx_v10_0_kiq_init_register()
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/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_7_0_d.h | 569 #define mmCP_HQD_ACTIVE 0x3247 macro
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D | gfx_7_2_d.h | 582 #define mmCP_HQD_ACTIVE 0x3247 macro
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D | gfx_8_0_d.h | 632 #define mmCP_HQD_ACTIVE 0x3247 macro
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D | gfx_8_1_d.h | 632 #define mmCP_HQD_ACTIVE 0x3247 macro
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/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 2823 #define mmCP_HQD_ACTIVE … macro
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D | gc_9_1_offset.h | 3051 #define mmCP_HQD_ACTIVE … macro
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D | gc_9_2_1_offset.h | 3007 #define mmCP_HQD_ACTIVE … macro
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D | gc_10_1_0_offset.h | 5287 #define mmCP_HQD_ACTIVE … macro
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D | gc_10_3_0_offset.h | 4920 #define mmCP_HQD_ACTIVE … macro
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