Searched refs:mmCP_CPC_IC_OP_CNTL (Results 1 – 8 of 8) sorted by relevance
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_8_0_d.h | 349 #define mmCP_CPC_IC_OP_CNTL 0x30bc macro
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D | gfx_8_1_d.h | 349 #define mmCP_CPC_IC_OP_CNTL 0x30bc macro
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/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v10_0.c | 5393 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache() 5395 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache() 5399 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache() 6043 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_cp_compute_load_microcode() 6045 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); in gfx_v10_0_cp_compute_load_microcode() 6049 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); in gfx_v10_0_cp_compute_load_microcode()
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/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_0_offset.h | 2609 #define mmCP_CPC_IC_OP_CNTL … macro
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D | gc_9_1_offset.h | 2879 #define mmCP_CPC_IC_OP_CNTL … macro
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D | gc_9_2_1_offset.h | 2813 #define mmCP_CPC_IC_OP_CNTL … macro
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D | gc_10_1_0_offset.h | 10265 #define mmCP_CPC_IC_OP_CNTL … macro
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D | gc_10_3_0_offset.h | 9875 #define mmCP_CPC_IC_OP_CNTL … macro
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