Home
last modified time | relevance | path

Searched refs:mmAZALIA_MEM_PWR_CTRL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h1467 #define mmAZALIA_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_1_0_offset.h1861 #define mmAZALIA_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_2_0_0_offset.h1505 #define mmAZALIA_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_3_0_0_offset.h1406 #define mmAZALIA_MEM_PWR_CTRL_BASE_IDX … macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h1539 #define mmAZALIA_MEM_PWR_CTRL_BASE_IDX … macro