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Searched refs:mmABM1_BL1_PWM_FINAL_DUTY_CYCLE_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h5710 #define mmABM1_BL1_PWM_FINAL_DUTY_CYCLE_BASE_IDX macro
Ddcn_3_0_0_offset.h15963 #define mmABM1_BL1_PWM_FINAL_DUTY_CYCLE_BASE_IDX macro