Home
last modified time | relevance | path

Searched refs:min_meta_chunk_width (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c366 unsigned int min_meta_chunk_width; in get_meta_and_pte_attr() local
506 min_meta_chunk_width = 1 in get_meta_and_pte_attr()
537 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
539 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
Ddisplay_rq_dlg_calc_20v2.c366 unsigned int min_meta_chunk_width; in get_meta_and_pte_attr() local
506 min_meta_chunk_width = 1 in get_meta_and_pte_attr()
537 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
539 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c356 unsigned int min_meta_chunk_width; in get_meta_and_pte_attr() local
500 min_meta_chunk_width = 1 in get_meta_and_pte_attr()
534 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
536 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
Ddisplay_mode_vba_21.c5875 unsigned int min_meta_chunk_width; in CalculateMetaAndPTETimes() local
5911 min_meta_chunk_width = MinMetaChunkSizeBytes * 256 in CalculateMetaAndPTETimes()
5916 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k]; in CalculateMetaAndPTETimes()
5918 meta_chunk_threshold = 2 * min_meta_chunk_width in CalculateMetaAndPTETimes()
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dml/
Ddml1_display_rq_dlg_calc.c573 unsigned int min_meta_chunk_width; in get_surf_rq_param() local
736 min_meta_chunk_width = 1 in get_surf_rq_param()
764 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_surf_rq_param()
766 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_surf_rq_param()
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c400 unsigned int min_meta_chunk_width = 0; in get_meta_and_pte_attr() local
567 min_meta_chunk_width = 1 in get_meta_and_pte_attr()
598 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
600 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
Ddisplay_mode_vba_30.c5888 unsigned int min_meta_chunk_width = 0; in CalculateMetaAndPTETimes() local
5923 min_meta_chunk_width = MinMetaChunkSizeBytes * 256 / BytePerPixelY[k] / meta_row_height[k]; in CalculateMetaAndPTETimes()
5927 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k]; in CalculateMetaAndPTETimes()
5929 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height[k]; in CalculateMetaAndPTETimes()