Searched refs:mi2s_bit_clk (Results 1 – 5 of 5) sorted by relevance
83 ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_startup()98 clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()255 ret = clk_set_rate(drvdata->mi2s_bit_clk[id], in lpass_cpu_daiops_hw_params()302 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_trigger()326 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_trigger()854 drvdata->mi2s_bit_clk[dai_id] = devm_clk_get(dev, in asoc_qcom_lpass_cpu_platform_probe()856 if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) { in asoc_qcom_lpass_cpu_platform_probe()860 PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); in asoc_qcom_lpass_cpu_platform_probe()861 return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]); in asoc_qcom_lpass_cpu_platform_probe()
65 struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS]; member
194 static struct clk_regmap_mux mi2s_bit_clk = { variable399 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,
178 static struct clk_regmap_mux mi2s_bit_clk = { variable486 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,
176 static struct clk_regmap_mux mi2s_bit_clk = { variable484 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,
