Searched refs:mem_table (Results 1 – 12 of 12) sorted by relevance
306 struct pdc_pat_pd_addr_map_entry mem_table[PAT_MAX_RANGES+1]; in pat_memconfig() local316 status = pdc_pat_pd_get_addr_map(&actual_len, mem_table, length, 0L); in pat_memconfig()345 mtbl_ptr = mem_table; in pat_memconfig()400 struct pdc_memory_table mem_table[MAX_PHYSMEM_RANGES]; in sprockets_memconfig() local407 status = pdc_mem_mem_table(&r_addr,mem_table, in sprockets_memconfig()430 mtbl_ptr = mem_table; in sprockets_memconfig()
610 dpm_table = &(data->dpm_table.mem_table); in vega20_setup_memclk_dpm_table()662 dpm_table = &(data->dpm_table.mem_table); in vega20_setup_default_dpm_tables()1032 data->dpm_table.mem_table.dpm_levels[data->dpm_table.mem_table.count - 2].value; in vega20_od8_set_feature_capabilities()1481 &(data->dpm_table.mem_table); in vega20_get_mclk_od()1483 &(data->golden_dpm_table.mem_table); in vega20_get_mclk_od()1500 &(data->golden_dpm_table.mem_table); in vega20_set_mclk_od()1527 struct vega20_single_dpm_table *mem_table = &(data->dpm_table.mem_table); in vega20_populate_umdpstate_clocks() local1530 hwmgr->pstate_mclk = mem_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()1533 mem_table->count > VEGA20_UMD_PSTATE_MCLK_LEVEL) { in vega20_populate_umdpstate_clocks()1535 hwmgr->pstate_mclk = mem_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()[all …]
586 dpm_table = &(data->dpm_table.mem_table); in vega12_setup_default_dpm_tables()1056 min_freq = data->dpm_table.mem_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()1064 min_freq = data->dpm_table.mem_table.dpm_state.hard_min_level; in vega12_upload_dpm_min_level()1148 max_freq = data->dpm_table.mem_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()1547 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.mem_table)); in vega12_force_dpm_highest()1549 data->dpm_table.mem_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1550 data->dpm_table.mem_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1551 data->dpm_table.mem_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()1576 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.mem_table)); in vega12_force_dpm_lowest()1578 data->dpm_table.mem_table.dpm_state.soft_min_level = in vega12_force_dpm_lowest()[all …]
1360 data->dpm_table.mem_table.count = 0; in vega10_setup_default_dpm_tables()1361 dpm_table = &(data->dpm_table.mem_table); in vega10_setup_default_dpm_tables()1821 &(data->dpm_table.mem_table); in vega10_populate_all_memory_levels()3328 struct vega10_single_dpm_table *mclk_table = &(data->dpm_table.mem_table); in vega10_find_dpm_states_clocks_in_dpm_table()3383 for (count = 0; count < dpm_table->mem_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()3384 dpm_table->mem_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()3467 &(data->dpm_table.mem_table), in vega10_trim_dpm_states()3544 data->dpm_table.mem_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3558 data->dpm_table.mem_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3601 data->dpm_table.mem_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()[all …]
128 struct vega12_single_dpm_table mem_table; member
149 struct vega10_single_dpm_table mem_table; member
180 struct vega20_single_dpm_table mem_table; member
62 struct arcturus_single_dpm_table mem_table; member
1697 struct smu_11_0_dpm_table *mem_table = in smu_v11_0_set_performance_level() local1712 mclk_min = mclk_max = mem_table->max; in smu_v11_0_set_performance_level()1717 mclk_min = mclk_max = mem_table->min; in smu_v11_0_set_performance_level()1723 mclk_min = mem_table->min; in smu_v11_0_set_performance_level()1724 mclk_max = mem_table->max; in smu_v11_0_set_performance_level()
481 struct smu_11_0_dpm_table *mem_table = in arcturus_populate_umd_state_clk() local491 pstate_table->uclk_pstate.min = mem_table->min; in arcturus_populate_umd_state_clk()492 pstate_table->uclk_pstate.peak = mem_table->max; in arcturus_populate_umd_state_clk()498 mem_table->count > ARCTURUS_UMD_PSTATE_MCLK_LEVEL && in arcturus_populate_umd_state_clk()503 mem_table->dpm_levels[ARCTURUS_UMD_PSTATE_MCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
1146 struct smu_11_0_dpm_table *mem_table = in navi10_populate_umd_state_clk() local1204 pstate_table->uclk_pstate.min = mem_table->min; in navi10_populate_umd_state_clk()1205 pstate_table->uclk_pstate.peak = mem_table->max; in navi10_populate_umd_state_clk()1211 mem_table->max > NAVI10_UMD_PSTATE_PROFILING_MEMCLK && in navi10_populate_umd_state_clk()
1058 struct smu_11_0_dpm_table *mem_table = in sienna_cichlid_populate_umd_state_clk() local1068 pstate_table->uclk_pstate.min = mem_table->min; in sienna_cichlid_populate_umd_state_clk()1069 pstate_table->uclk_pstate.peak = mem_table->max; in sienna_cichlid_populate_umd_state_clk()