Searched refs:mem_cntl (Results 1 – 3 of 3) sorted by relevance
2120 aty_st_le32(MEM_CNTL, par->mem_cntl, par); in aty_resume_chip()2488 par->mem_cntl = aty_ld_le32(MEM_CNTL, par); in aty_init()2492 switch (par->mem_cntl & 0xF) { in aty_init()2514 switch (par->mem_cntl & MEM_SIZE_ALIAS) { in aty_init()2544 par->mem_cntl &= ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS); in aty_init()2546 par->mem_cntl |= MEM_SIZE_512K; in aty_init()2548 par->mem_cntl |= MEM_SIZE_1M; in aty_init()2550 par->mem_cntl |= gtb_memsize ? MEM_SIZE_2M_GTB : MEM_SIZE_2M; in aty_init()2552 par->mem_cntl |= gtb_memsize ? MEM_SIZE_4M_GTB : MEM_SIZE_4M; in aty_init()2554 par->mem_cntl |= gtb_memsize ? MEM_SIZE_6M_GTB : MEM_SIZE_6M; in aty_init()[all …]
188 u32 mem_cntl; member
3235 uint32_t mem_cntl; in combios_detect_ram() local3239 mem_cntl = RREG32(RADEON_MEM_CNTL); in combios_detect_ram()3240 if (mem_cntl & RV100_HALF_MODE) in combios_detect_ram()3243 mem_cntl &= ~(0xff << 8); in combios_detect_ram()3244 mem_cntl |= (mem_addr_mapping & 0xff) << 8; in combios_detect_ram()3245 WREG32(RADEON_MEM_CNTL, mem_cntl); in combios_detect_ram()3269 uint32_t mem_cntl = 0; in combios_write_ram_size() local3280 mem_cntl = RBIOS32(offset + 1); in combios_write_ram_size()3284 WREG32(RADEON_MEM_CNTL, mem_cntl); in combios_write_ram_size()
