Searched refs:mec_hdr (Results 1 – 4 of 4) sorted by relevance
1945 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local1970 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init()1974 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init()1975 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_0_mec_init()1977 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init()3326 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local3336 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode()3337 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode()3341 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode()3354 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()[all …]
2717 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v7_0_cp_compute_load_microcode() local2724 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v7_0_cp_compute_load_microcode()2725 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v7_0_cp_compute_load_microcode()2726 adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); in gfx_v7_0_cp_compute_load_microcode()2728 mec_hdr->ucode_feature_version); in gfx_v7_0_cp_compute_load_microcode()2735 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_compute_load_microcode()2736 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_compute_load_microcode()
4087 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local4114 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init()4117 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init()4118 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init()4120 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init()6024 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local6035 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode()6036 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode()6040 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode()6078 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v10_0_cp_compute_load_microcode()[all …]
4266 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local4271 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode()4275 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode()4276 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode()4280 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()
