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Searched refs:max_drain_clk_mhz (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h80 uint16_t max_drain_clk_mhz; member
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c448 …ranges->reader_wm_sets[num_valid_sets].max_drain_clk_mhz = bw_params->clk_table.entries[i].dcfclk_… in build_watermark_ranges()
467 …ranges->reader_wm_sets[ranges->num_reader_wm_sets - 1].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK… in build_watermark_ranges()
476 ranges->writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()
/Linux-v5.10/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c567 ranges->reader_wm_sets[i].max_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()
587 ranges->writer_wm_sets[i].max_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()
/Linux-v5.10/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c934 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()
954 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c1574 ranges.reader_wm_sets[0].max_drain_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()
1581 ranges.writer_wm_sets[0].max_drain_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()
1586 ranges.reader_wm_sets[0].max_drain_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()
1593 ranges.writer_wm_sets[0].max_drain_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()
/Linux-v5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dnavi10_ppt.c1614 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()
1632 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()
Dsienna_cichlid_ppt.c1430 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1448 clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c3952 ranges.reader_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
3961 ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
3978 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;