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Searched refs:mask_offset (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/arch/arm/mach-davinci/
Dmux.h24 .mask_offset = mode_offset, \
35 .mask_offset = mode_offset, \
46 .mask_offset = mode_offset, \
Dmux.c72 mask = (cfg->mask << cfg->mask_offset); in davinci_cfg_reg()
76 tmp2 = (cfg->mode << cfg->mask_offset); in davinci_cfg_reg()
/Linux-v5.10/arch/arm/mach-omap1/include/mach/
Dmux.h29 .mask_offset = mode_offset, \
43 .mask_offset = mode_offset, \
54 .mask_offset = mode_offset, \
66 .mask_offset = mode_offset, \
109 const unsigned char mask_offset; member
/Linux-v5.10/arch/arm/plat-orion/
Dgpio.c46 int mask_offset; member
83 return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; in GPIO_EDGE_MASK()
88 return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in GPIO_LEVEL_MASK()
521 void __iomem *base, int mask_offset, in orion_gpio_init() argument
557 ochip->mask_offset = mask_offset; in orion_gpio_init()
586 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in orion_gpio_init()
594 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; in orion_gpio_init()
/Linux-v5.10/drivers/irqchip/
Dirq-brcmstb-l2.c60 int mask_offset; member
101 ~(irq_reg_readl(b->gc, b->mask_offset)); in brcmstb_l2_intc_irq_handle()
227 data->mask_offset = init_params->cpu_mask_status; in brcmstb_l2_intc_of_init()
/Linux-v5.10/arch/arm/plat-orion/include/plat/
Dorion-gpio.h35 void __iomem *base, int mask_offset,
/Linux-v5.10/drivers/pinctrl/mediatek/
Dmtk-eint.c313 int offset, mask_offset, index, virq; in mtk_eint_irq_handler() local
323 mask_offset = eint_num >> 5; in mtk_eint_irq_handler()
334 if (eint->wake_mask[mask_offset] & BIT(offset) && in mtk_eint_irq_handler()
335 !(eint->cur_mask[mask_offset] & BIT(offset))) { in mtk_eint_irq_handler()
/Linux-v5.10/arch/arm/mach-omap1/
Dmux.c348 mask = (0x7 << cfg->mask_offset); in omap1_cfg_reg()
352 tmp2 = (cfg->mask << cfg->mask_offset); in omap1_cfg_reg()
/Linux-v5.10/arch/arm/mach-davinci/include/mach/
Dmux.h26 const unsigned char mask_offset; member