Searched refs:lowest_pcie_level_enabled (Results 1 – 5 of 5) sorted by relevance
883 lowest_pcie_level_enabled = 0, in vegam_populate_all_graphic_levels() local934 (1 << lowest_pcie_level_enabled)) == 0)) in vegam_populate_all_graphic_levels()935 lowest_pcie_level_enabled++; in vegam_populate_all_graphic_levels()939 (1 << (lowest_pcie_level_enabled + 1 + count))) == 0)) in vegam_populate_all_graphic_levels()942 mid_pcie_level_enabled = (lowest_pcie_level_enabled + 1 + count) < in vegam_populate_all_graphic_levels()944 (lowest_pcie_level_enabled + 1 + count) : in vegam_populate_all_graphic_levels()952 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in vegam_populate_all_graphic_levels()
1019 lowest_pcie_level_enabled = 0, in fiji_populate_all_graphic_levels() local1063 (1 << lowest_pcie_level_enabled)) == 0)) in fiji_populate_all_graphic_levels()1064 lowest_pcie_level_enabled++; in fiji_populate_all_graphic_levels()1068 (1 << (lowest_pcie_level_enabled + 1 + count))) == 0)) in fiji_populate_all_graphic_levels()1071 mid_pcie_level_enabled = (lowest_pcie_level_enabled + 1 + count) < in fiji_populate_all_graphic_levels()1073 (lowest_pcie_level_enabled + 1 + count) : in fiji_populate_all_graphic_levels()1081 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
974 uint8_t lowest_pcie_level_enabled = 0, mid_pcie_level_enabled = 0; in iceland_populate_all_graphic_levels() local1011 (1 << lowest_pcie_level_enabled)) == 0) { in iceland_populate_all_graphic_levels()1012 lowest_pcie_level_enabled++; in iceland_populate_all_graphic_levels()1017 (1 << (lowest_pcie_level_enabled + 1 + count))) == 0)) { in iceland_populate_all_graphic_levels()1021 mid_pcie_level_enabled = (lowest_pcie_level_enabled+1+count) < highest_pcie_level_enabled ? in iceland_populate_all_graphic_levels()1022 (lowest_pcie_level_enabled+1+count) : highest_pcie_level_enabled; in iceland_populate_all_graphic_levels()1031 smu_data->smc_state_table.GraphicsLevel[0].pcieDpmLevel = lowest_pcie_level_enabled; in iceland_populate_all_graphic_levels()
996 lowest_pcie_level_enabled = 0, in polaris10_populate_all_graphic_levels() local1041 (1 << lowest_pcie_level_enabled)) == 0)) in polaris10_populate_all_graphic_levels()1042 lowest_pcie_level_enabled++; in polaris10_populate_all_graphic_levels()1046 (1 << (lowest_pcie_level_enabled + 1 + count))) == 0)) in polaris10_populate_all_graphic_levels()1049 mid_pcie_level_enabled = (lowest_pcie_level_enabled + 1 + count) < in polaris10_populate_all_graphic_levels()1051 (lowest_pcie_level_enabled + 1 + count) : in polaris10_populate_all_graphic_levels()1059 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in polaris10_populate_all_graphic_levels()
704 uint8_t lowest_pcie_level_enabled = 0, mid_pcie_level_enabled = 0; in tonga_populate_all_graphic_levels() local756 (1<<lowest_pcie_level_enabled)) == 0)) { in tonga_populate_all_graphic_levels()757 lowest_pcie_level_enabled++; in tonga_populate_all_graphic_levels()762 (1<<(lowest_pcie_level_enabled+1+count))) == 0)) { in tonga_populate_all_graphic_levels()765 mid_pcie_level_enabled = (lowest_pcie_level_enabled+1+count) < highest_pcie_level_enabled ? in tonga_populate_all_graphic_levels()766 (lowest_pcie_level_enabled+1+count) : highest_pcie_level_enabled; in tonga_populate_all_graphic_levels()774 smu_data->smc_state_table.GraphicsLevel[0].pcieDpmLevel = lowest_pcie_level_enabled; in tonga_populate_all_graphic_levels()
