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Searched refs:kiq_ring (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gfx.c460 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_gfx_disable_kcq() local
466 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size * in amdgpu_gfx_disable_kcq()
471 kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.compute_ring[i], in amdgpu_gfx_disable_kcq()
474 return amdgpu_ring_test_helper(kiq_ring); in amdgpu_gfx_disable_kcq()
493 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in amdgpu_gfx_enable_kcq() local
515 DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe, in amdgpu_gfx_enable_kcq()
516 kiq_ring->queue); in amdgpu_gfx_enable_kcq()
518 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size * in amdgpu_gfx_enable_kcq()
526 kiq->pmf->kiq_set_resources(kiq_ring, queue_mask); in amdgpu_gfx_enable_kcq()
528 kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.compute_ring[i]); in amdgpu_gfx_enable_kcq()
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Damdgpu_amdkfd_gfx_v10.c310 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_hiq_mqd_load() local
326 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_hiq_mqd_load()
332 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_hiq_mqd_load()
333 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load()
343 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load()
345 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_hiq_mqd_load()
346 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_hiq_mqd_load()
347 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_hiq_mqd_load()
348 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_hiq_mqd_load()
349 amdgpu_ring_commit(kiq_ring); in kgd_hiq_mqd_load()
Damdgpu_amdkfd_gfx_v9.c319 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_gfx_v9_hiq_mqd_load() local
335 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_gfx_v9_hiq_mqd_load()
341 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_gfx_v9_hiq_mqd_load()
342 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load()
352 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load()
354 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_gfx_v9_hiq_mqd_load()
355 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_gfx_v9_hiq_mqd_load()
356 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_gfx_v9_hiq_mqd_load()
357 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_gfx_v9_hiq_mqd_load()
358 amdgpu_ring_commit(kiq_ring); in kgd_gfx_v9_hiq_mqd_load()
Damdgpu_gfx.h76 void (*kiq_set_resources)(struct amdgpu_ring *kiq_ring,
78 void (*kiq_map_queues)(struct amdgpu_ring *kiq_ring,
80 void (*kiq_unmap_queues)(struct amdgpu_ring *kiq_ring,
84 void (*kiq_query_status)(struct amdgpu_ring *kiq_ring,
88 void (*kiq_invalidate_tlbs)(struct amdgpu_ring *kiq_ring,
Damdgpu_amdkfd_gfx_v10_3.c295 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in hiq_mqd_load_v10_3() local
311 r = amdgpu_ring_alloc(kiq_ring, 7); in hiq_mqd_load_v10_3()
317 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in hiq_mqd_load_v10_3()
318 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3()
328 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3()
330 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in hiq_mqd_load_v10_3()
331 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in hiq_mqd_load_v10_3()
332 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v10_3()
333 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in hiq_mqd_load_v10_3()
334 amdgpu_ring_commit(kiq_ring); in hiq_mqd_load_v10_3()
Dgfx_v9_0.c807 static void gfx_v9_0_kiq_set_resources(struct amdgpu_ring *kiq_ring, in gfx_v9_0_kiq_set_resources() argument
810 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v9_0_kiq_set_resources()
811 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
815 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
817 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
819 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v9_0_kiq_set_resources()
820 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v9_0_kiq_set_resources()
821 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v9_0_kiq_set_resources()
822 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_0_kiq_set_resources()
825 static void gfx_v9_0_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx_v9_0_kiq_map_queues() argument
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Dgfx_v10_0.c3217 static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx10_kiq_set_resources() argument
3219 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx10_kiq_set_resources()
3220 amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) | in gfx10_kiq_set_resources()
3222 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx10_kiq_set_resources()
3223 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx10_kiq_set_resources()
3224 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx10_kiq_set_resources()
3225 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx10_kiq_set_resources()
3226 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx10_kiq_set_resources()
3227 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx10_kiq_set_resources()
3230 static void gfx10_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx10_kiq_map_queues() argument
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Dmes_v10_1.c790 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring;
796 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size);
802 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring);
804 r = amdgpu_ring_test_ring(kiq_ring);
807 kiq_ring->sched.ready = false;
Dgfx_v8_0.c4351 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v8_0_kiq_kcq_enable() local
4370 r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 8); in gfx_v8_0_kiq_kcq_enable()
4376 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v8_0_kiq_kcq_enable()
4377 amdgpu_ring_write(kiq_ring, 0); /* vmid_mask:0 queue_type:0 (KIQ) */ in gfx_v8_0_kiq_kcq_enable()
4378 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v8_0_kiq_kcq_enable()
4379 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v8_0_kiq_kcq_enable()
4380 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v8_0_kiq_kcq_enable()
4381 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v8_0_kiq_kcq_enable()
4382 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v8_0_kiq_kcq_enable()
4383 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v8_0_kiq_kcq_enable()
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