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Searched refs:irq_enable_mask (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.10/arch/mips/sgi-ip30/
Dip30-irq.c26 static DEFINE_PER_CPU(unsigned long, irq_enable_mask);
148 unsigned long *mask = &per_cpu(irq_enable_mask, hd->cpu); in ip30_mask_heart_irq()
157 unsigned long *mask = &per_cpu(irq_enable_mask, hd->cpu); in ip30_mask_and_ack_heart_irq()
167 unsigned long *mask = &per_cpu(irq_enable_mask, hd->cpu); in ip30_unmask_heart_irq()
251 unsigned long *mask = &per_cpu(irq_enable_mask, cpu); in ip30_install_ipi()
282 mask = &per_cpu(irq_enable_mask, 0); in arch_init_irq()
285 mask = &per_cpu(irq_enable_mask, 1); in arch_init_irq()
/Linux-v5.10/arch/mips/sgi-ip27/
Dip27-irq.c32 static DEFINE_PER_CPU(unsigned long [2], irq_enable_mask);
52 unsigned long *mask = per_cpu(irq_enable_mask, hd->cpu); in enable_hub_irq()
62 unsigned long *mask = per_cpu(irq_enable_mask, hd->cpu); in disable_hub_irq()
189 unsigned long *mask = per_cpu(irq_enable_mask, cpu); in ip27_do_irq_mask0()
231 unsigned long *mask = per_cpu(irq_enable_mask, cpu); in ip27_do_irq_mask1()
256 unsigned long *mask = per_cpu(irq_enable_mask, cpu); in install_ipi()
/Linux-v5.10/drivers/gpu/drm/i915/gt/
Dgen2_engine_cs.c295 i915->irq_mask &= ~engine->irq_enable_mask; in gen2_irq_enable()
304 i915->irq_mask |= engine->irq_enable_mask; in gen2_irq_disable()
310 engine->i915->irq_mask &= ~engine->irq_enable_mask; in gen3_irq_enable()
317 engine->i915->irq_mask |= engine->irq_enable_mask; in gen3_irq_disable()
323 gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask); in gen5_irq_enable()
328 gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask); in gen5_irq_disable()
Dgen6_engine_cs.c427 ~(engine->irq_enable_mask | engine->irq_keep_mask)); in gen6_irq_enable()
432 gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask); in gen6_irq_enable()
438 gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask); in gen6_irq_disable()
443 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_enable_mask); in hsw_irq_enable_vecs()
448 gen6_gt_pm_unmask_irq(engine->gt, engine->irq_enable_mask); in hsw_irq_enable_vecs()
454 gen6_gt_pm_mask_irq(engine->gt, engine->irq_enable_mask); in hsw_irq_disable_vecs()
Dintel_ring_submission.c1107 engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT; in setup_rcs()
1122 engine->irq_enable_mask = I915_USER_INTERRUPT; in setup_rcs()
1138 engine->irq_enable_mask = GT_BSD_USER_INTERRUPT; in setup_vcs()
1147 engine->irq_enable_mask = ILK_BSD_USER_INTERRUPT; in setup_vcs()
1149 engine->irq_enable_mask = I915_BSD_USER_INTERRUPT; in setup_vcs()
1158 engine->irq_enable_mask = GT_BLT_USER_INTERRUPT; in setup_bcs()
1173 engine->irq_enable_mask = PM_VEBOX_USER_INTERRUPT; in setup_vecs()
Dintel_engine_types.h411 u32 irq_enable_mask; /* bitmask to enable ring interrupt */ member
Dintel_lrc.c4521 ~(engine->irq_enable_mask | engine->irq_keep_mask)); in gen8_logical_ring_enable_irq()
5134 engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT << shift; in logical_ring_default_irqs()
/Linux-v5.10/drivers/gpu/drm/via/
Dvia_irq.c268 dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; in via_driver_irq_preinstall()
287 dev_priv->irq_enable_mask |= cur_irq->enable_mask; in via_driver_irq_preinstall()
299 ~(dev_priv->irq_enable_mask)); in via_driver_irq_preinstall()
317 | dev_priv->irq_enable_mask); in via_driver_irq_postinstall()
341 ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); in via_driver_irq_uninstall()
Dvia_drv.h97 uint32_t irq_enable_mask; member
/Linux-v5.10/drivers/pinctrl/
Dpinctrl-single.c141 unsigned irq_enable_mask; member
675 if (pcs_soc->irq_enable_mask) { in pcs_add_pin()
679 if (val & pcs_soc->irq_enable_mask) { in pcs_add_pin()
682 val &= ~pcs_soc->irq_enable_mask; in pcs_add_pin()
1399 soc_mask = pcs_soc->irq_enable_mask; in pcs_irq_set()
1570 if (!pcs_soc->irq_enable_mask || in pcs_irq_init_chained_handler()
1933 .irq_enable_mask = (1 << 14), /* OMAP_WAKEUP_EN */
1938 .irq_enable_mask = (1 << 24), /* WAKEUPENABLE */
1944 .irq_enable_mask = (1 << 29), /* OMAP_WAKEUP_EN */
/Linux-v5.10/drivers/dma/ti/
Domap-dma.c59 uint32_t irq_enable_mask; member
639 status &= od->irq_enable_mask; in omap_dma_irq()
727 od->irq_enable_mask |= val; in omap_dma_alloc_chan_resources()
728 omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask); in omap_dma_alloc_chan_resources()
762 od->irq_enable_mask &= ~BIT(c->dma_ch); in omap_dma_free_chan_resources()
763 omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask); in omap_dma_free_chan_resources()
1772 od->irq_enable_mask = 0; in omap_dma_probe()