Searched refs:iommu_virt_to_phys (Results 1 – 3 of 3) sorted by relevance
95 static inline u64 iommu_virt_to_phys(void *vaddr) in iommu_virt_to_phys() function
365 u64 start = iommu_virt_to_phys((void *)iommu->cmd_sem); in iommu_set_cwwb_range()393 entry = iommu_virt_to_phys(amd_iommu_dev_table); in iommu_set_device_table()654 entry = iommu_virt_to_phys(iommu->cmd_buf); in iommu_enable_command_buffer()707 entry = iommu_virt_to_phys(iommu->evt_buf) | EVT_LEN_MASK; in iommu_enable_event_buffer()748 entry = iommu_virt_to_phys(iommu->ppr_log) | PPR_LOG_SIZE_512; in iommu_enable_ppr_log()821 entry = iommu_virt_to_phys(iommu->ga_log) | GA_LOG_SIZE_512; in iommu_init_ga_log()824 entry = (iommu_virt_to_phys(iommu->ga_log_tail) & in iommu_init_ga_log()
915 u64 paddr = iommu_virt_to_phys((void *)iommu->cmd_sem); in build_completion_wait()1521 *pte = PM_LEVEL_PDE(pgtable.mode, iommu_virt_to_phys(pgtable.root)); in increase_address_space()1611 __npte = PM_LEVEL_PDE(level, iommu_virt_to_phys(page)); in alloc_pte()1908 pte_root = iommu_virt_to_phys(pgtable->root); in set_dte_entry()1927 u64 gcr3 = iommu_virt_to_phys(domain->gcr3_tbl); in set_dte_entry()2993 *pte = iommu_virt_to_phys(root) | GCR3_VALID; in __get_gcr3_pte()3192 dte |= iommu_virt_to_phys(table->table); in set_dte_irq_entry()
