Searched refs:integrated_info (Results 1 – 9 of 9) sorted by relevance
278 if (bp->integrated_info) in dce_clock_read_integrated_info()279 clk_mgr_dce->base.dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq; in dce_clock_read_integrated_info()314 if (bp->integrated_info) in dce_clock_read_integrated_info()315 if (bp->integrated_info->disp_clk_voltage[i].max_supported_clk >= 100000) in dce_clock_read_integrated_info()317 bp->integrated_info->disp_clk_voltage[i].max_supported_clk; in dce_clock_read_integrated_info()320 if (!debug->disable_dfs_bypass && bp->integrated_info) in dce_clock_read_integrated_info()321 if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE) in dce_clock_read_integrated_info()
1360 struct integrated_info info = {{{ 0 }}}; in dc_link_construct()1520 if (bios->integrated_info) in dc_link_construct()1521 info = *bios->integrated_info; in dc_link_construct()1748 struct integrated_info *integrated_info = in get_ext_hdmi_settings() local1749 pipe_ctx->stream->ctx->dc_bios->integrated_info; in get_ext_hdmi_settings()1751 if (integrated_info == NULL) in get_ext_hdmi_settings()1761 if (integrated_info->gpu_cap_info & 0x20) { in get_ext_hdmi_settings()1764 settings->slv_addr = integrated_info->dp0_ext_hdmi_slv_addr; in get_ext_hdmi_settings()1765 settings->reg_num = integrated_info->dp0_ext_hdmi_6g_reg_num; in get_ext_hdmi_settings()1766 settings->reg_num_6g = integrated_info->dp0_ext_hdmi_6g_reg_num; in get_ext_hdmi_settings()[all …]
336 if (bp->integrated_info) in rv1_clk_mgr_construct()337 clk_mgr->base.dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq; in rv1_clk_mgr_construct()344 if (!debug->disable_dfs_bypass && bp->integrated_info) in rv1_clk_mgr_construct()345 if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE) in rv1_clk_mgr_construct()
164 struct integrated_info *integrated_info; member
345 struct integrated_info info = { { { 0 } } }; in dce_clock_read_integrated_info()349 if (bp->integrated_info) in dce_clock_read_integrated_info()350 info = *bp->integrated_info; in dce_clock_read_integrated_info()394 if (!debug->disable_dfs_bypass && bp->integrated_info) in dce_clock_read_integrated_info()395 if (bp->integrated_info->gpu_cap_info & DFS_BYPASS_ENABLE) in dce_clock_read_integrated_info()
780 …struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct integrated_info *bios_info) in rn_clk_mgr_helper_populate_bw_params()889 if (ctx->dc_bios->integrated_info->memory_type == LpDdr4MemType) { in rn_clk_mgr_construct()918 ctx->dc_bios && ctx->dc_bios->integrated_info) { in rn_clk_mgr_construct()919 …r_helper_populate_bw_params (clk_mgr->base.bw_params, &clock_table, ctx->dc_bios->integrated_info); in rn_clk_mgr_construct()
117 kfree(bp->base.integrated_info); in bios_parser2_destruct()1533 struct integrated_info *info) in get_integrated_info_v11()1763 struct integrated_info *info) in construct_integrated_info()1848 static struct integrated_info *bios_parser_create_integrated_info( in bios_parser_create_integrated_info()1852 struct integrated_info *info = NULL; in bios_parser_create_integrated_info()1854 info = kzalloc(sizeof(struct integrated_info), GFP_KERNEL); in bios_parser_create_integrated_info()2374 bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base); in bios_parser2_construct()
117 kfree(bp->base.integrated_info); in bios_parser_destruct()2230 struct integrated_info *info) in get_integrated_info_v8()2380 struct integrated_info *info) in get_integrated_info_v9()2517 struct integrated_info *info) in construct_integrated_info()2566 static struct integrated_info *bios_parser_create_integrated_info( in bios_parser_create_integrated_info()2570 struct integrated_info *info = NULL; in bios_parser_create_integrated_info()2572 info = kzalloc(sizeof(struct integrated_info), GFP_KERNEL); in bios_parser_create_integrated_info()2919 bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base); in bios_parser_construct()
289 struct integrated_info { struct
