| /Linux-v5.10/arch/sh/kernel/ |
| D | traps_32.c | 85 static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs, in handle_unaligned_ins() argument
93 index = (instruction>>8)&15; /* 0x0F00 */ in handle_unaligned_ins()
96 index = (instruction>>4)&15; /* 0x00F0 */ in handle_unaligned_ins()
99 count = 1<<(instruction&3); in handle_unaligned_ins()
109 switch (instruction>>12) { in handle_unaligned_ins()
111 if (instruction & 8) { in handle_unaligned_ins()
143 dstu += (instruction&0x000F)<<2; in handle_unaligned_ins()
151 if (instruction & 4) in handle_unaligned_ins()
165 srcu += (instruction & 0x000F) << 2; in handle_unaligned_ins()
176 if (instruction & 4) in handle_unaligned_ins()
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| /Linux-v5.10/drivers/media/usb/gspca/ |
| D | jl2005bcd.c | 107 static u8 instruction[2] = {0x95, 0x00}; in jl2005c_read_reg() local
109 instruction[1] = reg; in jl2005c_read_reg()
111 retval = jl2005c_write2(gspca_dev, instruction); in jl2005c_read_reg()
125 static u8 instruction[2] = {0x7f, 0x01}; in jl2005c_start_new_frame() local
127 retval = jl2005c_write2(gspca_dev, instruction); in jl2005c_start_new_frame()
152 u8 instruction[2]; in jl2005c_write_reg() local
154 instruction[0] = reg; in jl2005c_write_reg()
155 instruction[1] = value; in jl2005c_write_reg()
157 retval = jl2005c_write2(gspca_dev, instruction); in jl2005c_write_reg()
200 static u8 instruction[][2] = { in jl2005c_stream_start_vga_lg() local
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| /Linux-v5.10/Documentation/virt/kvm/ |
| D | s390-pv.rst | 26 the behavior of the SIE instruction. A new format 4 state description
48 of an instruction emulation by KVM, e.g. we can never inject a
65 With the format 4 state description for PVMs, the SIE instruction already
67 to interpret every instruction, but needs to hand some tasks to KVM;
73 the instruction data, such as I/O data structures, are filtered.
78 Only GR values needed to emulate an instruction will be copied into this
82 the bytes of the instruction text, but with pre-set register values
83 instead of the actual ones. I.e. each instruction always uses the same
84 instruction text, in order not to leak guest instruction text.
88 The Secure Instruction Data Area contains instruction storage
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| /Linux-v5.10/net/nfc/hci/ |
| D | hcp.c | 22 u8 type, u8 instruction, in nfc_hci_hcp_message_tx() argument
75 packet->message.header = HCP_HEADER(type, instruction); in nfc_hci_hcp_message_tx()
120 u8 instruction, struct sk_buff *skb) in nfc_hci_hcp_message_rx() argument
124 nfc_hci_resp_received(hdev, instruction, skb); in nfc_hci_hcp_message_rx()
127 nfc_hci_cmd_received(hdev, pipe, instruction, skb); in nfc_hci_hcp_message_rx()
130 nfc_hci_event_received(hdev, pipe, instruction, skb); in nfc_hci_hcp_message_rx()
134 type, instruction); in nfc_hci_hcp_message_rx()
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| /Linux-v5.10/tools/objtool/ |
| D | check.h | 22 struct instruction { struct
39 struct instruction *jump_dest; argument
40 struct instruction *first_jump_src; argument
51 static inline bool is_static_jump(struct instruction *insn) in is_static_jump() argument
57 struct instruction *find_insn(struct objtool_file *file,
|
| D | check.c | 26 struct instruction *insn;
32 struct instruction *find_insn(struct objtool_file *file, in find_insn()
35 struct instruction *insn; in find_insn()
45 static struct instruction *next_insn_same_sec(struct objtool_file *file, in next_insn_same_sec()
46 struct instruction *insn) in next_insn_same_sec()
48 struct instruction *next = list_next_entry(insn, list); in next_insn_same_sec()
56 static struct instruction *next_insn_same_func(struct objtool_file *file, in next_insn_same_func()
57 struct instruction *insn) in next_insn_same_func()
59 struct instruction *next = list_next_entry(insn, list); in next_insn_same_func()
76 static struct instruction *prev_insn_same_sym(struct objtool_file *file, in prev_insn_same_sym()
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| D | arch.h | 73 struct instruction;
85 unsigned long arch_jump_destination(struct instruction *insn);
91 int arch_decode_hint_reg(struct instruction *insn, u8 sp_reg);
|
| /Linux-v5.10/drivers/video/backlight/ |
| D | otm3225a.c | 160 struct otm3225a_spi_instruction *instruction, in otm3225a_write() argument
169 buf[2] = instruction->reg; in otm3225a_write()
174 buf[1] = (instruction->value >> 8) & 0xff; in otm3225a_write()
175 buf[2] = instruction->value & 0xff; in otm3225a_write()
179 if (instruction->delay) in otm3225a_write()
180 msleep(instruction->delay); in otm3225a_write()
181 instruction++; in otm3225a_write()
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| /Linux-v5.10/arch/nios2/platform/ |
| D | Kconfig.platform | 63 bool "Enable MUL instruction"
66 instruction. This will enable the -mhw-mul compiler flag.
69 bool "Enable MULX instruction"
72 instruction. Enables the -mhw-mulx compiler flag.
75 bool "Enable DIV instruction"
78 instruction. Enables the -mhw-div compiler flag.
102 bool "Byteswap custom instruction"
104 Use the byteswap (endian converter) Nios II custom instruction provided
109 int "Byteswap custom instruction number" if NIOS2_CI_SWAB_SUPPORT
112 Number of the instruction as configured in QSYS Builder.
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| /Linux-v5.10/Documentation/arm64/ |
| D | legacy_instructions.rst | 7 the architecture. The infrastructure code uses undefined instruction
9 the instruction execution in hardware.
18 Generates undefined instruction abort. Default for instructions that
25 usage of emulated instruction is traced as well as rate limited
38 The default mode depends on the status of the instruction in the
43 individual instruction notes for further information.
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| /Linux-v5.10/Documentation/staging/ |
| D | lzo.rst | 22 the operands for the instruction, whose size and position depend on the
23 opcode and on the number of literals copied by previous instruction. The
59 After any instruction except the large literal copy, 0, 1, 2 or 3 literals
60 are copied before starting the next instruction. The number of literals that
61 were copied may change the meaning and behaviour of the next instruction. In
62 practice, only one instruction needs to know whether 0, less than 4, or more
65 generally encoded in the last two bits of the instruction but may also be
69 instruction may encode this distance (0001HLLL), it takes one LE16 operand
100 0..16 : follow regular instruction encoding, see below. It is worth
123 Depends on the number of literals copied by the last instruction.
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| /Linux-v5.10/Documentation/powerpc/ |
| D | syscall64-abi.rst | 10 The syscall is made with the sc instruction, and returns with execution
11 continuing at the instruction following the sc instruction.
14 scv 0 instruction is an alternative that may provide better performance,
32 - For the sc instruction, both a value and an error condition are returned.
38 - For the scv 0 instruction, the return value indicates failure if it is
53 | For the sc instruction, differences with the ELF ABI |
62 | For the scv 0 instruction, differences with the ELF ABI |
124 The vsyscall is performed with a branch-with-link instruction to the vsyscall
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| /Linux-v5.10/arch/arm/probes/kprobes/ |
| D | test-core.h | 154 #define TEST_INSTRUCTION(instruction) \ argument
156 "1: "instruction" \n\t" \
159 #define TEST_BRANCH_F(instruction) \ argument
160 TEST_INSTRUCTION(instruction) \
164 #define TEST_BRANCH_B(instruction) \ argument
169 TEST_INSTRUCTION(instruction)
171 #define TEST_BRANCH_FX(instruction, codex) \ argument
172 TEST_INSTRUCTION(instruction) \
178 #define TEST_BRANCH_BX(instruction, codex) \ argument
184 TEST_INSTRUCTION(instruction)
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| /Linux-v5.10/arch/mips/loongson2ef/ |
| D | Platform | 13 # an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
18 # instruction that labels refer to, ie. if we label an ll instruction:
23 # instruction inserted by the assembler, and if we were using the label in an
25 # instruction.
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| /Linux-v5.10/arch/arm/nwfpe/ |
| D | entry.S | 78 bne next @ get the next instruction;
81 bl EmulateAll @ emulate the instruction
87 .Lx1: ldrt r6, [r5], #4 @ get the next instruction and
104 @ plain LDR instruction. Weird, but it seems harmless.
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| /Linux-v5.10/arch/s390/kvm/ |
| D | trace.h | 157 __field(__u64, instruction)
162 __entry->instruction = ((__u64)ipa << 48) |
167 __entry->instruction,
168 __print_symbolic(icpt_insn_decoder(__entry->instruction),
424 __field(__u64, instruction)
429 __entry->instruction = ((__u64)ipa << 48) |
434 __entry->instruction,
435 __print_symbolic(icpt_insn_decoder(__entry->instruction),
|
| /Linux-v5.10/arch/openrisc/ |
| D | Kconfig | 101 bool "Have instruction l.ff1"
104 Select this if your implementation has the Class II instruction l.ff1
107 bool "Have instruction l.fl1"
110 Select this if your implementation has the Class II instruction l.fl1
113 bool "Have instruction l.mul for hardware multiply"
116 Select this if your implementation has a hardware multiply instruction
119 bool "Have instruction l.div for hardware divide"
122 Select this if your implementation has a hardware divide instruction
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| /Linux-v5.10/arch/mips/loongson64/ |
| D | Platform | 10 # an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
15 # instruction that labels refer to, ie. if we label an ll instruction:
20 # instruction inserted by the assembler, and if we were using the label in an
22 # instruction.
|
| /Linux-v5.10/Documentation/trace/ |
| D | kprobes.rst | 38 any instruction in the kernel. A return probe fires when a specified
65 instruction and replaces the first byte(s) of the probed instruction
66 with a breakpoint instruction (e.g., int3 on i386 and x86_64).
68 When a CPU hits the breakpoint instruction, a trap occurs, the CPU's
74 Next, Kprobes single-steps its copy of the probed instruction.
75 (It would be simpler to single-step the actual instruction in place,
77 instruction. This would open a small time window when another CPU
80 After the instruction is single-stepped, Kprobes executes the
82 Execution then continues with the instruction following the probepoint.
88 register set, including instruction pointer. This operation requires
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| /Linux-v5.10/arch/arm/kernel/ |
| D | entry-armv.S | 233 @ Correct the PC such that it is pointing at the instruction
234 @ which caused the fault. If the faulting instruction was ARM
235 @ the PC will be pointing at the next instruction, and have to
237 @ pointing at the second half of the Thumb instruction. We
248 @ If a kprobe is about to simulate a "stmdb sp..." instruction,
257 @ the instruction, or the more conventional lr if we are to treat
258 @ this as a real undefined instruction
260 @ r0 - instruction
266 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
267 cmp r0, #0xe800 @ 32-bit instruction if xx >= 0
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| /Linux-v5.10/arch/m68k/fpsp040/ |
| D | bugfix.S | 247 | dest and the dest of the xu. We must clear the instruction in
248 | the cu and restore the state, allowing the instruction in the
249 | xu to complete. Remember, the instruction in the nu
251 | If the result of the xu instruction is not exceptional, we can
252 | restore the instruction from the cu to the frame and continue
275 | Check if the instruction which just completed was exceptional.
280 | It is necessary to isolate the result of the instruction in the
369 | dest and the dest of the xu. We must clear the instruction in
370 | the cu and restore the state, allowing the instruction in the
371 | xu to complete. Remember, the instruction in the nu
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| /Linux-v5.10/arch/m68k/ifpsp060/src/ |
| D | isp.S | 1218 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1219 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1230 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1231 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1242 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1243 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1254 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1255 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
1266 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1267 addq.l &0x2,EXC_EXTWPTR(%a6) # incr instruction ptr
[all …]
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| D | pfpsp.S | 1228 # the FPIAR holds the "current PC" of the faulting instruction
1232 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
1233 addq.l &0x4,EXC_EXTWPTR(%a6) # incr instruction ptr
1234 bsr.l _imem_read_long # fetch the instruction words
1722 # three instruction exceptions don't update the stack pointer. so, if the
2038 # The opclass two PACKED instruction that took an "Unimplemented Data Type"
2371 # _imem_read_long() - read instruction longword #
2384 # fmovm_dynamic() - emulate dynamic fmovm instruction #
2385 # fmovm_ctrl() - emulate fmovm control instruction #
2404 # (2) The "fmovm.x" instruction w/ dynamic register specification. #
[all …]
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| /Linux-v5.10/Documentation/arm/nwfpe/ |
| D | notes.rst | 11 often uses an stfe instruction to save f4 on the stack upon entry to a
12 function, and an ldfe instruction to restore it before returning.
18 This is a side effect of the stfe instruction. The double in f4 had to be
32 in extended precision, due to the stfe instruction used to save f4 in log(y).
|
| /Linux-v5.10/tools/objtool/Documentation/ |
| D | stack-validation.txt | 15 validates the correct frame pointer state at each instruction.
19 alternative execution paths to a given instruction (or set of
123 ENTRY/ENDPROC macros. If objtool finds a return instruction
195 uses an inline asm() statement which has a "call" instruction. An
196 asm() statement with a call instruction must declare the use of the
205 2. file.o: warning: objtool: .text+0x53: unreachable instruction
207 Objtool couldn't find a code path to reach the instruction.
209 If the error is for an asm file, and the instruction is inside (or
224 4. file.o: warning: objtool: func(): can't find starting instruction
226 file.o: warning: objtool: func()+0x11dd: can't decode instruction
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