Searched refs:gfx_table (Results 1 – 12 of 12) sorted by relevance
573 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()694 struct vega12_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table);1046 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()1137 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()1541 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_highest()1543 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1544 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1545 data->dpm_table.gfx_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()1570 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_lowest()1572 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_lowest()[all …]
589 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()655 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()1435 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()1437 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()1454 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()1526 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local1529 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()1532 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umdpstate_clocks()1534 hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()1789 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega20_upload_dpm_min_level()[all …]
1350 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()1672 struct vega10_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table); in vega10_populate_all_graphic_levels()3325 struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); in vega10_find_dpm_states_clocks_in_dpm_table()3377 for (count = 0; count < dpm_table->gfx_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()3378 dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()3461 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()3531 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3537 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3589 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()3594 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()[all …]
127 struct vega12_single_dpm_table gfx_table; member
148 struct vega10_single_dpm_table gfx_table; member
179 struct vega20_single_dpm_table gfx_table; member
61 struct arcturus_single_dpm_table gfx_table; member
326 dpm_table = &dpm_context->dpm_tables.gfx_table; in arcturus_set_default_dpm_table()479 struct smu_11_0_dpm_table *gfx_table = in arcturus_populate_umd_state_clk() local480 &dpm_context->dpm_tables.gfx_table; in arcturus_populate_umd_state_clk()488 pstate_table->gfxclk_pstate.min = gfx_table->min; in arcturus_populate_umd_state_clk()489 pstate_table->gfxclk_pstate.peak = gfx_table->max; in arcturus_populate_umd_state_clk()497 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()501 gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()734 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_print_clk_levels()842 freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value; in arcturus_upload_dpm_level()912 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_force_clk_levels()
1695 struct smu_11_0_dpm_table *gfx_table = in smu_v11_0_set_performance_level() local1696 &dpm_context->dpm_tables.gfx_table; in smu_v11_0_set_performance_level()1711 sclk_min = sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()1716 sclk_min = sclk_max = gfx_table->min; in smu_v11_0_set_performance_level()1721 sclk_min = gfx_table->min; in smu_v11_0_set_performance_level()1722 sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()
658 dpm_table = &dpm_context->dpm_tables.gfx_table; in navi10_set_default_dpm_table()1144 struct smu_11_0_dpm_table *gfx_table = in navi10_populate_umd_state_clk() local1145 &dpm_context->dpm_tables.gfx_table; in navi10_populate_umd_state_clk()1155 pstate_table->gfxclk_pstate.min = gfx_table->min; in navi10_populate_umd_state_clk()1199 sclk_freq = gfx_table->dpm_levels[gfx_table->count - 1].value; in navi10_populate_umd_state_clk()1210 if (gfx_table->max > NAVI10_UMD_PSTATE_PROFILING_GFXCLK && in navi10_populate_umd_state_clk()
575 dpm_table = &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_set_default_dpm_table()1056 struct smu_11_0_dpm_table *gfx_table = in sienna_cichlid_populate_umd_state_clk() local1057 &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_populate_umd_state_clk()1065 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()1066 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()
94 struct smu_11_0_dpm_table gfx_table; member
