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Searched refs:emac_base (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.10/drivers/net/ethernet/ti/
Ddavinci_emac.c317 void __iomem *emac_base; member
361 #define emac_read(reg) ioread32(priv->emac_base + (reg))
362 #define emac_write(reg, val) iowrite32(val, priv->emac_base + (reg))
1841 priv->emac_base = priv->remap_addr + pdata->ctrl_reg_offset; in davinci_emac_probe()
1850 dma_params.dmaregs = priv->emac_base; in davinci_emac_probe()
1851 dma_params.rxthresh = priv->emac_base + 0x120; in davinci_emac_probe()
1852 dma_params.rxfree = priv->emac_base + 0x140; in davinci_emac_probe()
1853 dma_params.txhdp = priv->emac_base + 0x600; in davinci_emac_probe()
1854 dma_params.rxhdp = priv->emac_base + 0x620; in davinci_emac_probe()
1855 dma_params.txcp = priv->emac_base + 0x640; in davinci_emac_probe()
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/Linux-v5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_link.c1414 u32 emac_base) in bnx2x_set_mdio_clk() argument
1421 cur_mode = REG_RD(bp, emac_base + EMAC_REG_EMAC_MDIO_MODE); in bnx2x_set_mdio_clk()
1439 REG_WR(bp, emac_base + EMAC_REG_EMAC_MDIO_MODE, new_mode); in bnx2x_set_mdio_clk()
1473 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_emac_init() local
1485 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); in bnx2x_emac_init()
1490 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); in bnx2x_emac_init()
1809 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_emac_enable() local
1839 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_RX_MODE, in bnx2x_emac_enable()
1841 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_TX_MODE, in bnx2x_emac_enable()
1845 bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_RX_MODE, in bnx2x_emac_enable()
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Dbnx2x.h233 #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg)
234 #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val)
Dbnx2x_main.c9149 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_send_unload_req() local