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/Linux-v5.10/arch/mips/ath79/
Dclock.c126 u32 mult, div, ddr_div, ahb_div; in ar724x_clocks_init() local
136 ddr_div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1; in ar724x_clocks_init()
140 ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div); in ar724x_clocks_init()
153 u32 ddr_div; in ar933x_clocks_init() local
172 ddr_div = 1; in ar933x_clocks_init()
197 ddr_div = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT) & in ar933x_clocks_init()
207 ref_div * out_div * ddr_div); in ar933x_clocks_init()