Searched refs:ddr50 (Results 1 – 23 of 23) sorted by relevance
| /Linux-v5.10/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-omap.txt | 15 "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104",
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| D | sdhci-st.txt | 57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
109 sd-uhs-ddr50;
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| D | brcm,sdhci-brcmstb.txt | 22 sd-uhs-ddr50;
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | stih410-b2120.dts | 34 sd-uhs-ddr50;
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| D | stih418-b2199.dts | 84 sd-uhs-ddr50;
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| D | dra72-evm.dts | 94 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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| D | dra72-evm-revc.dts | 124 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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| D | dra7-evm.dts | 389 …pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50"…
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| D | dra71-evm.dts | 201 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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| D | stm32mp157c-ed1.dts | 340 sd-uhs-ddr50;
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| D | rk3288-firefly-reload.dts | 265 sd-uhs-ddr50;
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| D | exynos5420-arndale-octa.dts | 806 sd-uhs-ddr50;
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| D | qcom-ipq8064.dtsi | 784 sd-uhs-ddr50;
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| D | exynos5422-odroid-core.dtsi | 981 sd-uhs-ddr50;
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| /Linux-v5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905x-libretech-cc-v2.dts | 255 sd-uhs-ddr50;
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| D | meson-gx-libretech-pc.dtsi | 382 sd-uhs-ddr50;
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| D | meson-gxbb-nanopi-k2.dts | 309 sd-uhs-ddr50;
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| D | meson-gxbb-odroidc2.dts | 326 sd-uhs-ddr50;
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| /Linux-v5.10/include/linux/ |
| D | rtsx_pci.h | 1260 #define SET_CLOCK_PHASE(sdr104, sdr50, ddr50) \ argument
1261 (((ddr50) << 16) | ((sdr50) << 8) | (sdr104))
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| /Linux-v5.10/arch/arm64/boot/dts/ti/ |
| D | k3-am65-main.dtsi | 276 ti,otap-del-sel-ddr50 = <0x5>;
298 ti,otap-del-sel-ddr50 = <0x4>;
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| D | k3-j7200-main.dtsi | 415 ti,otap-del-sel-ddr50 = <0xc>;
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| /Linux-v5.10/arch/powerpc/boot/dts/ |
| D | fsp2.dts | 506 sd-uhs-ddr50;
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| /Linux-v5.10/arch/arm64/boot/dts/zte/ |
| D | zx296718.dtsi | 345 sd-uhs-ddr50;
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