Searched refs:dcn2_1_soc (Results 1 – 1 of 1) sorted by relevance
164 struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { variable1400 dcn2_1_soc.num_chans = bw_params->num_channels; in update_bw_bounding_box()1405 for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) { in update_bw_bounding_box()1406 if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { in update_bw_bounding_box()1418 clock_limits[i].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in update_bw_bounding_box()1419 clock_limits[i].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in update_bw_bounding_box()1420 …clock_limits[i].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_… in update_bw_bounding_box()1421 clock_limits[i].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in update_bw_bounding_box()1422 clock_limits[i].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in update_bw_bounding_box()1423 clock_limits[i].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in update_bw_bounding_box()[all …]
