Searched refs:crtc_base (Results 1 – 12 of 12) sorted by relevance
| /Linux-v5.10/drivers/gpu/drm/radeon/ |
| D | rv770.c | 808 void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in rv770_page_flip() argument
822 WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
823 WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
825 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
826 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
829 (u32)crtc_base); in rv770_page_flip()
831 (u32)crtc_base); in rv770_page_flip()
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| D | rs600.c | 118 void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in rs600_page_flip() argument
132 (u32)crtc_base); in rs600_page_flip()
134 (u32)crtc_base); in rs600_page_flip()
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| D | radeon_asic.h | 141 u64 crtc_base, bool async);
253 u64 crtc_base, bool async);
467 void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base,
538 u64 crtc_base, bool async);
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| D | evergreen.c | 1418 void evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, in evergreen_page_flip() argument
1427 upper_32_bits(crtc_base)); in evergreen_page_flip()
1429 (u32)crtc_base); in evergreen_page_flip()
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| D | r100.c | 162 void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in r100_page_flip() argument
165 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; in r100_page_flip()
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| D | radeon.h | 1998 void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base, bool async);
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| /Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_mode.h | 282 int crtc_id, u64 crtc_base, bool async);
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| D | dce_virtual.c | 63 int crtc_id, u64 crtc_base, bool async) in dce_virtual_page_flip() argument
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| D | dce_v6_0.c | 191 int crtc_id, u64 crtc_base, bool async) in dce_v6_0_page_flip() argument
204 upper_32_bits(crtc_base)); in dce_v6_0_page_flip()
206 (u32)crtc_base); in dce_v6_0_page_flip()
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| D | dce_v8_0.c | 184 int crtc_id, u64 crtc_base, bool async) in dce_v8_0_page_flip() argument
197 upper_32_bits(crtc_base)); in dce_v8_0_page_flip()
200 lower_32_bits(crtc_base)); in dce_v8_0_page_flip()
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| D | dce_v10_0.c | 236 int crtc_id, u64 crtc_base, bool async) in dce_v10_0_page_flip() argument
252 upper_32_bits(crtc_base)); in dce_v10_0_page_flip()
255 lower_32_bits(crtc_base)); in dce_v10_0_page_flip()
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| D | dce_v11_0.c | 254 int crtc_id, u64 crtc_base, bool async) in dce_v11_0_page_flip() argument
270 upper_32_bits(crtc_base)); in dce_v11_0_page_flip()
273 lower_32_bits(crtc_base)); in dce_v11_0_page_flip()
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